MATHEMATICAL EVALUATION OF A PROPOSED GATE TURN OFF THYRISTOR AND RELATED SEMICONDUCTOR DEVICES

ROBERT LAWRENCE RISBERG, Marquette University

Abstract

This thesis is concerned with a mathematical evaluation of a proposed new Gate Turn Off Thyristor. The proposed new G.T.O. would employ control of the emission of holes by the anode P1 layer as well as the conventional control of the emission of electrons by the cathode N2 layer. In its simplest form the structure consists of a lightly N doped wafer with a P diffusion into the cathode side, referred to as P2, and an N diffusion into the anode side, referred to as N1. Shallow N2 islands are then diffused into P2 and serve as the cathode. Shallow P1 islands are then diffused into the N1 layer and serve as the anode. Contact is made to P2 and this is used as the conventional gate. A separate contact is made to N1 which serves as a gate or control lead for controlling P1. It is suggested that the P1 islands could be converted to P channel DMOS transistors or to PNP bipolar devices to accomplish high gain. The object of the thesis is to determine what advantage the proposed device will have in switching high current at high voltage. The upper end of the voltage range, i.e., 1200V to 2400V was chosen because transistors are not available above 1200V. To ensure that the simulated device is viable and reasonably optimized, an analysis is made of related structures, i.e., PIN power diodes and high voltage transistors. The study of these devices is important in its own right because PIN diodes are used with G.T.O.s and power transistors compete with G.T.O.s at 1000V to 1200V. The construction and on state and blocking state of PIN diodes is very similar to that of G.T.O.s. The P2 and N2 regions at the cathode end of G.T.O.s. are also identical to that of power transistors. The first chapter introduces the subject of solid state power conversion. The second chapter surveys the field of switching devices. The third chapter reviews and analyses PIN power diodes. Chapter 4 reviews power transistors, focusing on a 1200V design. Chapter 5 describes the construction of the G.T.O.s. Chapter 6 describes the theoretical operation of the G.T.O.s and includes computer results.

This paper has been withdrawn.