Document Type

Conference Proceeding

Language

eng

Publication Date

8-4-2019

Publisher

Institute of Electrical and Electronic Engineers (IEEE)

Source Publication

2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)

Source ISSN

9781728127873

Abstract

The impact of multiple levels of uncertainty in design parameters and uncertainty correlations on the quality of mapping solutions in embedded systems is investigated. The investigation is done with a simulation tool developed to conduct multi-objective design space exploration in order to generate robust Pareto frontiers in the solution space formed by reliability, execution time, and energy as design objectives. The simulation tool integrates proposed models for uncertainty and a hyper-volume based technique for quantifying the difference between Pareto frontiers. Simulations results show that by not considering uncertainty and correlations between different sources of uncertainty can lead to overestimation of the performance of the optimal solutions.

Comments

Accepted version. 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), (August 4-7, 2019): 1077-1080. DOI. © 2019 Institute of Electrical and Electronic Engineers (IEEE). Used with permission

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