Document Type
Article
Language
eng
Publication Date
2017
Publisher
Elsevier
Source Publication
HardwareX
Source ISSN
1877-7058
Abstract
We present an field programmable gate arrays (FPGA) based implementation of the popular Viola-Jones face detection algorithm, which is an essential building block in many applications such as video surveillance and tracking. Our implementation is a complete system level hardware design described in a hardware description language and validated on the affordable DE2-115 evaluation board. Our primary objective is to study the achievable performance with a low-end FPGA chip based implementation. In addition, we release to the public domain the entire project. We hope that this will enable other researchers to easily replicate and compare their results to ours and that it will encourage and facilitate further research and educational ideas in the areas of image processing, computer vision, and advanced digital design and FPGA prototyping.
Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial-No Derivative Works 4.0 International License.
Recommended Citation
Irgens, Peter; Bader, Curtis; Lé, Theresa; Saxena, Devansh; and Ababei, Cristinel, "An Efficient and Cost Effective FPGA Based Implementation of the Viola-Jones Face Detection Algorithm" (2017). Electrical and Computer Engineering Faculty Research and Publications. 307.
https://epublications.marquette.edu/electric_fac/307
Comments
Published version. HardwareX, Vol 1 (2017): 68-75. DOI. 2017 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).