Document Type
Article
Language
eng
Publication Date
10-2017
Publisher
Elsevier
Source Publication
Microprocessors and Microsystems
Source ISSN
1046-4964
Abstract
We introduce a novel algorithm for dynamic energy management (DEM) under performance constraints in chip multi-processors (CMPs). Using the novel concept of delayed instructions count, performance loss estimations are calculated at the end of each control period for each core. In addition, a Kalman filtering based approach is employed to predict workload in the next control period for which voltage-frequency pairs must be selected. This selection is done with a novel dynamic voltage and frequency scaling (DVFS) algorithm whose objective is to reduce energy consumption but without degrading performance beyond the user set threshold. Using our customized Sniper based CMP system simulation framework, we demonstrate the effectiveness of the proposed algorithm for a variety of benchmarks for 16 core and 64 core network-on-chip based CMP architectures. Simulation results show consistent energy savings across the board. We present our work as an investigation of the tradeoff between the achievable energy reduction via DVFS when predictions are done using the effective Kalman filter for different performance penalty thresholds.
Recommended Citation
Moghaddam, Milad Ghorbani and Ababei, Cristinel, "Dynamic Energy Management for Chip Multi-processors under Performance Constraints" (2017). Electrical and Computer Engineering Faculty Research and Publications. 313.
https://epublications.marquette.edu/electric_fac/313
Comments
Accepted version. Microprocessors and Microsystems, Vol. 54 (October 2017): 1-13. DOI © 2018 Elsevier B.V. Used with permission.