Document Type

Conference Proceeding

Publication Date

9-2020

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Source Publication

2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)

Source ISSN

9781728180595

Abstract

Increased uncertainties in design parameters undermine the accuracy of the mapping of embedded applications to Network-on-Chip (NoC) based manycore architectures. In this paper, we attempt for the first time to apply the info-gap theory to uncertainty modeling in the context of embedded systems design. We first propose a novel info-gap based uncertainty-aware reliability model for NoC based manycore platforms. We then develop an uncertainty-aware solution to the problem of mapping in embedded systems. The solution is implemented as a computer program that can generate robust Pareto frontiers. Simulation results indicate that the proposed info-gap based uncertainty-aware mapping generates Pareto frontiers that have significant differences from the ones obtained with a traditional deterministic approach. Identifying and quantifying these differences is an important first step towards the development of better mapping optimization processes in order to arrive to optimal rather than suboptimal solutions.

Comments

Accepted version. "Reliability Optimization Under Severe Uncertainty for NoC Based Architectures Using an Info-Gap Decision Approach," Published as a part of the conference proceedings, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), (August 9-12, 2020): 478-481. DOI. © 2020 Institute of Electrical and Electronics Engineers (IEEE). Used with permission.

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