Date of Award
Spring 1993
Document Type
Thesis - Restricted
Degree Name
Master of Science (MS)
Department
Electrical Engineering and Computer Science
First Advisor
Heinen, James A.
Second Advisor
Feng, Xin
Third Advisor
Kuo, Sen M.
Abstract
Pipelined, parallel processing digital signal processing systems have the potential to provide tremendous computational capacity, necessary to perform image processing and other computationally intensive operations in a real-time environment. Achieving this objective requires that two areas be addressed. The first area involves providing a suitable hardware platform for implementing a parallel system with pipelines present. This may require a substantial amount of inter processor communication, depending on the algorithm being implemented. The second area involves programming an algorithm on the hardware platform. The difficulties that arise exist in the identification of non-explicit parallel and pipelined operations, in order to facilitate the programming of the algorithm onto the hardware platform. This thesis contributes to the second area by presenting a simple method for identification of parallel and pipelined operations in an algorithm, to facilitate the programming of this algorithm.
Recommended Citation
Reeve, Ian F., "Identification of Pipelining Channels in Parallel Digital Signal Processor Systems" (1993). Master's Theses (1922-2009) Access restricted to Marquette Campus. 3834.
https://epublications.marquette.edu/theses/3834